Tools and Techniques for Musicians, Composers, and Tinkerers
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#ifndef ADCS
#define ADCS 2
#elif (ADCS >=0)&&(ADCS <= 4)
#else
#error ADCS value not defined
#endif// setup variables for ADC
#if ADCS == 0
// do nothing
#elif ADCS == 1
unsigned char _i = 64;
unsigned int _mod0temp = 0x0000;
#elif ADCS == 2
unsigned char _i = 130;
unsigned int _mod0temp = 0x0000;
unsigned int _mod1temp = 0x0000;
#elif ADCS == 3
unsigned char _i = 196;
unsigned int _mod0temp = 0x0000;
unsigned int _mod1temp = 0x0000;
unsigned int _mod2temp = 0x0000;
#elif ADCS == 4
unsigned char _i = 255; // this needs to be fixed - the value needs to be 260, but thats larger than a char
unsigned int _mod0temp = 0x0000;
unsigned int _mod1temp = 0x0000;
unsigned int _mod2temp = 0x0000;
unsigned int _mod3temp = 0x0000;
#endif // setup ADCs
#if ADCS == 0
DIDR0 = (1 << ADC1D)|(1 << ADC0D); // turn off digital inputs for ADC0 and ADC1
#elif (ADCS == 1) || (ADCS == 2)
ADMUX = 0x40; // start with ADC0 - internal VCC for Vref
ADCSRA = 0xe7; // ADC enable, autotrigger, ck/128
ADCSRB = 0x00; // free running mode
DIDR0 = (1 << ADC1D)|(1 << ADC0D); // turn off digital inputs for ADC0 and ADC1
#elif (ADCS == 3)
ADMUX = 0x40; // start with ADC0 - internal VCC for Vref
ADCSRA = 0xe7; // ADC enable, autotrigger, ck/128
ADCSRB = 0x00; // free running mode
DIDR0 = (1<<ADC2D)|(1 << ADC1D)|(1 << ADC0D); // turn off digital inputs for ADC0:2
#elif (ADCS == 4)
ADMUX = 0x40; // start with ADC0 - internal VCC for Vref
ADCSRA = 0xe7; // ADC enable, autotrigger, ck/128
ADCSRB = 0x00; // free running mode
DIDR0 = (1<<ADC3D)|(1<<ADC2D)|(1 << ADC1D)|(1 << ADC0D); // turn off digital inputs for ADC0:3
#endif#elif ADCS == 3
static inline void AudioCodec_ADC(unsigned int* _mod0value, unsigned int* _mod1value, unsigned int* _mod2value) {
if (ADCSRA & (1 << ADIF)) { // check if sample ready
--_i; // check which sample we are on
if (_i == 194) { // do nothing, first sample after mux change
}
else if (_i >= 130) { // sample ADC0
_mod0temp += ADCL; // fetch ADCL first to freeze sample
_mod0temp += (ADCH << 8); // add to temp register
if (_i == 130) { // check if enough samples have been averaged
// add in hysteresis to remove jitter
if (((_mod0temp - *_mod0value) < HYST) || ((*_mod0value - _mod0temp) < HYST)) {
}
else {
*_mod0value = _mod0temp; // move temp value
}
_mod0temp = 0x0000; // reset temp value
ADMUX = 0x41; // switch to ADC1
}
}
else if (_i == 129) { // do nothing, first sample after adc change
}
else if (_i >= 65) { // sample ADC1
_mod1temp += ADCL; // fetch ADCL first to freeze sample
_mod1temp += (ADCH << 8); // add to temp register
if (_i == 65) { // check if enough samples have been averaged
// add in hysteresis to remove jitter
if (((_mod1temp - *_mod1value) < HYST) || ((*_mod1value - _mod1temp) < HYST)) {
}
else {
*_mod1value = _mod1temp; // move temp value
}
_mod1temp = 0x0000; // reset temp value
ADMUX = 0x42; // switch to ADC2
}
else if (_i <= 63) { // sample ADC2, 64 ignored to skip first sample after change
_mod1temp += ADCL; // fetch ADCL first to freeze sample
_mod1temp += (ADCH << 8); // add to temp register
if (_i == 0) { // check if enough samples have been averaged
// add in hysteresis to remove jitter
if (((_mod2temp - *_mod2value) < HYST) || ((*_mod2value - _mod2temp) < HYST)) {
}
else {
*_mod2value = _mod2temp; // move temp value
}
_mod2temp = 0x0000; // reset temp value
ADMUX = 0x40; // switch to ADC0
_i = 195; // reset counter
}
}
ADCSRA = 0xf7; // reset the interrupt flag
}
}